DIGITAL SIGNAL PROCESSORS
VERSUS MICROPROCESSORS
Conventional Microprocessors
A conventional microprocessor commonly uses a von Neumann
architecture, which means that there is only one common system bus
used for transfer of both instructions and data betw
Digital Signal Processors
Architecture
DSP chips often have a Harvard -type architecture or some modified
version of Harvard architecture. This type of system architecture
implies that there are at least two system buses, one for instruction
transfers and
DIGITAL-TO-ANALOG CONVERSION
The task of the digital-to-analog converter (DAC) is to convert a
numerical, commonly binary digital value into an analog output signal.
The DAC is subject to many requirements, such as offset, gain,
linearity, monotonicity an
DSP System
From a high-level point of view, a DSP system performs the following
operations: Accepts an analog signal as an input, Converts this analog
signal to numbers, Performs computations using the numbers, Converts
the results of the computations bac
ENCODING AND MODULATION
Assuming we have converted our analog signals to numbers in the digital
world, there are many ways to encode the digital information into the shape of
electrical signals. This process is called modulation . The most common method
i
RANGE AND PRECISION IN FIXED
POINT NUMBERS
A fixed point representation can be characterized by the
range
of expressible
numbers (that is, the distance between the largest and
smallest numbers) and the precision
(the distance between two adjacent numbers
Binary versus Decimal
Representations
While most computers use base 2 for internal
representation and arithmetic,
some calculators and business computers use an internal
representation of base
10, and thus do not suffer from this representational
problem.
AN EARLY LOOK AT COMPUTER
ARITHMETIC
We will explore computer arithmetic in detail in Chapter 3,
but for the moment,
we need to learn how to perform simple binary addition
because it is used in representing
signed binary numbers. Binary addition is perfor
492 Problem 9.33
In the textbook, the capacity of the NEXTdominated channel is derived as
l IHNEXT(f)I2]
C = log £1+ df
29L 2 Vitfz
where Fa is the set of positive and negative frequencies for which Sx(f) > 0, where Sx(f) is the
power spectral density
Cha ter 10
Error-Control Coding
Problem 10.1
The matrix of transition probabilities of a discrete memoryless channel with 2 inputs and
Q outputs may be written as
P = to I0) p(1 I0) p(2 I0) p(Q-l lo)
(0 I1) p(1l1) p(2 I1) p(Q-l I1)
For a symmetric
The generalized encoder and decoder presented here are described in Valenti (1998); see the
Bibliography.
Problem 10.35
The decoding scheme used for turbo codes relies on the assumption that the bit probabilities
remain independent from one iteration to
Each of these two paths is extended in two ways to form four paths of length 2; their
squared Euclidean distances from the received sequence are as follows:
(a)
dzl = 0.01 + (0.0 - 1.1)2 = 1.22
(122:2 = 3.6! + (0.0 - 0.9)2 = 4.42
(b)
dis = 0.01 + (0.0
Problem 9.2
Let the event S=sk denote the emission of symbol sk by the source, Hence,
I(sk) = log2 bits
P
I(sk) bits 1.322 1.737 2.322 3.322
Problem 9.3
Entropy of the source is
H(S)
pologz -1 + pllogz -1 + p210g2 3- + P310g2 1
P0 P1 P2
Z.
_ J
1
Problem 8.18
For the problem at hand, we have M = N = 2. Therefore,
M - N+l = l
and so the weight subspace W is onedimensional. We thus have the following representation for
the action of the antenna array:
C2
(Interferer)
Onedimensional
0
H(S) = 2 Pk 1032[1]
, k=0
K1 1
= _ log2K = log2K
k=0
The coding efciency is therefore
n = H(S) = 10g2K
13 1o
For 11:1, we have
10 = 10g2K
To satisfy this requirement, we choose
K = 210
where 10 is an integer.
Problem 9.10
A prex code is dened as a