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CIS206 cis206 architect and comouter design

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  • Top Course Tags

    Background Knowledge Expected

    A Few Big Assignments

    Great Intro to the Subject

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    • Profile picture
    May 19, 2016
    | Would highly recommend.

    Not too easy. Not too difficult.

    Course Overview:

    complements the Computer Architecture and Operating Systems course. Students will gain practical experience with systems programming above and below the system call interface of operating systems. Students will learn how to write concurrent programs and gain understanding how kernel programming differs from normal application development.

    Course highlights:

    ECET 390/492/493/494: Electrical Engineering / Biomedical Engineering Technology Senior Project ECET 375: Introduction to Networking ECET 465: Advanced Networking ECET 370: Data Structures and Algorithms ECET 360: Operating Systems ECET 365: Embedded Systems Programming CIS 206: Computer Architecture and Operating Systems with Lab DBM 405: Advanced Database with Lab CIS336/ECET 450: Database Systems Design with Lab SEC 280: Principles of Information Security SEC 370: Web Security COMP 328/274: Object Oriented programming (JAVA) COMP 220: Object Oriented Programming with Lab (C++) COMP 122: Structured Programming with Lab (C++) CIS 170A: Programming with Visual Basic COMP 230: Shell Scripting CEIS 100: Introduction to Engineering and Information Sciences COMP 100: Computer Applications for Business

    Hours per week:

    6-8 hours

    Advice for students:

    Requires Presentations,A Few Big Assignments

    • Spring 2016
    • Abrahms
    • Yes
    • Background Knowledge Expected A Few Big Assignments Requires Lots of Research
    • Profile picture
    Jun 13, 2016
    | Would highly recommend.

    Not too easy. Not too difficult.

    Course Overview:

    is intended to provide the student with an appreciation of modern computer design and its relation to system architecture, compiler technology and operating system functionality. The course places an emphasis on design based on the measurement of performance and its dependency on parallelism, efficiency, latency and resource utilization.

    Course highlights:

    Digital Hardware Design Transistors, digital logic, hardware description languages (Verilog) Instruction Set Architecture Instruction types and mixes, addressing, RISC vs CISC, exceptions Scalar Pipelines Data dependencies, static scheduling, performance VLIW Pipelines Local scheduling, loop unrolling, software pipelining, trace scheduling, deferred exceptions, predicated execution, IA64 Dynamic Pipelines Dynamical scheduling, register renaming, speculative execution, trace cache Thread-Level Parallelism Cache coherency, sequential consistency, multithreading, symmetric multiprocessing, transactional memory Data-Level Parallelism GPGPU programming

    Hours per week:

    9-11 hours

    Advice for students:

    is a grad course held with CS 450. Students enrolled in CS 650 will be required to implement a 2-way superscalar dynamically scheduled processor in addition to all of the CS450 requirements.

    • Winter 2015
    • Arthur Basler
    • Yes
    • Math-heavy Background Knowledge Expected Great Intro to the Subject

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