George Mason University
ECE-448 Midterm
Midterm Exam
ECE 448
Spring 2011
Thursday Section
(15 points)
Instructions
Zip all your deliverables into an archive <last_name>.zip and submit it through
Blackboard no later than Thursday, March 10, 10:15 PM EST.
T
ECE 448: Final Exam Spring 2006 May 11, 2006 Part I (closed books, closed notes) (30 minutes, 30 questions, 0.25 pt each, total 7.5 points)
1. Your name:
2. The newest Mentor Graphics tool that automatically converts un-timed C/C+ descriptions into synthe
Final Exam Spring 2007 May 10, 2007 (25 points) Part II (open books, open notes) (1 hr 45 minutes, 5 questions, 2x5+3x2.5 pt, 17.5 points)
Problem 1 (5 points) Draw a block diagram of the execution unit of a circuit capable of storing a set of 32 8-bit un
Final Exam
Spring 2009
May 12, 2009
(25 points)
Part II (open books, open notes)
(2 hr 15 minutes, 4 questions, 3x5+1x2.5 pt = 17.5 points)
Problem 1 (5 points)
Draw a block diagram of the execution unit of a circuit capable of storing a set of 128 8-bit
Midterm Exam ECE 448 Spring 2008 Wednesday Section (15 points)
Instructions Zip all your deliverables into an archive <last_name>.zip and submit it through WebCT no later than Wednesday, March 5, 10:00 PM EST.
Introduction
Design a circuit that accepts sa
Final Exam
Spring 2010
Problem 1 (5 points)
Draw a block diagram of the execution unit of a circuit capable of storing a set of 64 8-bit
unsigned integers in an internal memory, and then computing the first three largest numbers in
this set. In parallel,
Midterm Exam ECE 448 Spring 2008 Tuesday Section (15 points)
Instructions Zip all your deliverables into an archive <last_name>.zip and submit it through WebCT no later than Tuesday, March 4, 10:00 PM EST.
Introduction Design a system that performs a bit-
Final Exam
Spring 2008
May 12, 2008
(25 points)
Part II (open books, open notes)
(2 hr 15 minutes, 4 questions, 3x5+1x2.5 pt = 17.5 points)
Problem 1 (5 points)
Draw a block diagram of the execution unit of a circuit capable of storing a set of 256 16-bit
ECE 448
Final Exam Part 1
Spring 2010
1. Your name:
2. List at least three advantages of ASICs when compared to FPGAs
3. The carry & control logic used in Spartan 3E FPGAs to implement fast addition is aimed
primarily at minimizing the following delay of
ECE 448: Final Exam
Spring 2008
May 12, 2008
Part I (closed books, closed notes)
(30 minutes, 30 questions, 0.25 pt each, total 7.5 points)
1. Your name:
2. The recent study regarding the comparison of the area, speed, and power of ASICs vs.
FPGAs, report
Lab 4
VGA Display. Bouncing Ball.
Design and implement a digital circuit capable of displaying predefined patterns on the screen of
a VGA monitor, and provide the basic components for a bouncing ball display. Your circuit must
generate all control and dat
ECE 448: Final Exam
Spring 2009
May 12, 2009
Part I (closed books, closed notes)
(30 minutes, total 7.5 points)
1. Your name:
2. List at least three advantages of FPGAs when compared to ASICs
3. The recent study regarding the comparison of the area, speed
FIR Filter Module with Oversampling
Introduction Design a digital system that will perform a filtering operation using a 4-tap FIR filter. The system clock rate is 4x faster than the incoming data rate, which allows efficient computation of the convolutio
ECE448
Cascaded Integrator/Comb
Midterm for Tuesday
The ECE448 Team
3/16/2010
Introduction
Your task is to describe in VHDL, debug, and implement a DSP circuit called Cascaded Integrator/Comb
(CIC).
The CIC has two main sections: the comb section and the
Midterm Exam
ECE 448
Spring 2010
Wednesday Section
(15 points)
Instructions
Please read this entire document carefully before beginning!
Zip all your deliverables into an archive <last_name>.zip and submit it through
Blackboard no later than Wednesday, Ma
Midterm Exam
ECE 448
Spring 2010
Monday Section
(15 points)
Instructions
Zip all your deliverables into an archive <last_name>.zip and submit it through
Blackboard no later than Monday, March 15, 10:15 PM EST.
Introduction
Design a circuit that accepts
t
Midterm Exam
ECE 448
Spring 2010
Thursday Section
(15 points)
Instructions
Zip all your deliverables into an archive <last_name>.zip and submit it through
Blackboard no later than Thursday, March 18, 10:15 PM EST.
Introduction
Your task is to describe in
Midterm Exam
ECE 448
Spring 2011
Monday Section
(15 points)
Instructions:
Zip all your deliverables into an archive <last_name>.zip and submit it through
Blackboard no later than Monday, March 7, 10:15 PM EST.
Introduction:
Design a Moving-Average Persist
GEORGE MASON UNIVERSITY
Serial FIR Filter
A Brief Study in DSP
ECE448
Spring 2011
Tuesday Section
15 points
3/8/2011
Instructions:
Zip all your deliverables into an archive <last_name>.zip and submit it thr
ECE 448
Midterm Exam
Wednesday, March 3, 2010
Introduction
The digital circuit shown in the diagram below is called a bit-serial multiplier.
This circuit is capable of multiplying two unsigned 4-bit numbers A and B, and
producing the PRODUCT=A*B.
A is loa
ECE 448
Midterm Exam
Tuesday, March 3, 2009
Problem 1 (2.5 points)
For a given below VHDL code, provide solutions to the following problems:
1. Which type of a finite state machine, Moore or Mealy, does this code implement?
2. Draw an ASM chart describing
George Mason University
ECE-448 Midterm
Midterm Exam
ECE 448
Spring 2011
Wednesday Section
(15 points)
Instructions:
Please read this entire document carefully before beginning!
Zip all your deliverables into an archive <last_name>.zip and submit it throu
ECE 448: Quiz 4 Solutions Answer given below questions: 1. Your name: 2. Divide the following storage devices into one-time programmable (OTP) and those that can be programmed multiple number of times: a. SRAM b. fusible-link c. antifuse d. FLASH e. EPROM
Lab 3
Sequential Logic for Synthesis. FPGA Design Flow.
Part 1
Task 1
Develop a VHDL description of a Debouncer specified below.
The following diagram shows the interface of the Debouncer.
The following diagram shows the inside of the Debouncer unit.
Task