VT) 2 2 . Substituting the known numerical values, iDS = 4 103(2
1)2 2 = 2 mA. How does iDS change if vDS is doubled? If vDS is
doubled to 4 V, iDS = K(vDS VT) 2 2 = 4 103(4 1)2 2 = 18 mA
In other words, iDS increases to 18 mA when vDS is doubled. What i
between voltage levels and logic values in the static discipline used by
Disco Systems. Valid 1 Valid 0 0 V 5 V Sender Receiver 1 0 0 1
Forbidden region 1 Noise margin 0 Noise margin 0 V 5 V 3.5 V 2 V 4 V
1.5 V VOH VIH VIL VOL 5.1 Voltage Levels and the S
VD, ID (given by ID/VTH) and the small perturbation in applied diode
voltage 218 CHAPTER FOUR analysis of nonlinear circuits FIGURE
4.38 Graphical interpretation of operating point and incremental signals.
ID vD iD VD vD iD Slope of the i-v curve at the o
5.2. For convenience, we will use 1, TRUE, and high interchangeably.
Similarly, we will use 0, FALSE, and low interchangeably. example 5.6
motion detector logic Let us write the boolean expression for a motion
detector that operates as follows: The circui
Thus, a sinusoidal voltage with rms value vrms applied across a resistor
of value R will result in an average power dissipation of v 2 rms/R. For
example, 120-V 60-Hz wall outlets in the United States are rated by their
rms values. Thus, they supply a sin
applied voltage VD + vD contains two terms: a large DC current ID and
a small current proportional to vD, if we keep vD small enough. A
graphical interpretation of this result is often helpful. As shown in Figure
4.37, Equation 4.61 is the straight line p
find the Thvenin equivalent for Network B shown in Figure 3.69a. Let
vTHB and RTHB be the Thvenin parameters for this network. vTHB is
the open-circuit voltage at the bb port in the network in Figure 3.69b.
Using reasoning similar to that for vTHA we find
Figure 7.6 behaves as an amplifier for properly chosen values of RL. In
other words, the circuit produces an amplified version of vI at its output
vO. Section 7.4 will introduce a physical device that behaves as a
voltage-controlled current source and dev
circuit elements we have seen previously. This chapter also discusses a
common implementation of the switch in VLSI technology using a
device called a MOSFET (Metal Oxide Semiconductor Field-Effect
Transistor). 6.1 THE SWITCH Recall the electrical system
1987 RISC microprocessor 2 m 1994 Multiprocessor communications
controller 0.5 m 2002 Raw microprocessor 0.18 m TAB L E 6.2
Historical gatelength scaling observations. FIGURE 6.38 A crosssectional TEM (transmission electron microscope) picture of Intels
0
Analysis CHAPTER TWO 89 tedious. Fortunately, as we shall see in
Chapter 3, there are much less tedious approaches to this analysis.
However, in advance of that we can still simplify the analysis by
employing results taken solely from earlier sections of
Receiver A = 0 Noise 0.6 V vOUT = 0.5 V vIN = 1.1 V (< 2 V) Incorrect
reception v vOUT IN Sender A = 0 Receiver A = ? Noise 1.6 V vOUT =
0.5 V vIN = 2.1 V (> 2 V) - + - + F IGUR E 5.7 Noise margins and
signal transmission. below 2 V as a logical 0. Furthe
dvI
vI=VI vi. Simplifying, vo = 1 1 + 4VIRKvi = 10.9 mV which
is the same as the value obtained by analyzing the small-signal circuit.
4.6 Summary CHAPTER FOUR 229 4.6 SUMMARY This chapter
introduced nonlinear circuits and their analyses. Nonlinear circui
interpreted by a receiver as a logical 1? f) What is the 0 noise margin
provided by this logic family? g) What is the 1 noise margin provided by
this logic family? h) What is the minimum voltage gain the buffer must
provide in the forbidden region? PROBLE
in Figure 3.26. Thus, we are partially done with the analysis of the
circuit in Figure 3.26. - + i 0 v0 + - v1 R1 i 2 R2 v V 2 + - + - i 1 i 3 + v3 V e i 1 FIGURE 3.26 A circuit with a dependent source. The results
of our analysis of the circuit in Figure
the lowest voltage that must be interpreted by a receiver as a logical 1?
g) Does this choice of voltage thresholds offer any immunity to noise? If
so, determine the noise margins. e x e r c i s e 5.10 Consider a family of
logic gates that operates under
+ - vD iD E vR (b) Short circuit segment - + R - + + - vD iD E vR (c)
Open circuit segment FIGURE 4.24 Piecewise linear analysis of a
simple diode circuit. 208 CHAPTER FOUR analysis of nonlinear
circuits Short circuit segment: Figure 4.24b shows the resul
For example, in analyzing a high-fidelity audio amplifier, we might wish
to find only the relationship between the voltage at the output terminals
and the voltage at the input terminals. The intermediate voltage and
current variables might be of no direct
solved for I. This solution yields I = R1 + (1 + )R2 V. (3.50) The
actual value of the CCCS is now known. Finally, we back-substitute
Equation 3.50, namely the actual value of I, into Equations 3.42 through
3.48 to obtain v0 = V (3.51) i0 = 1 R1 + (1 + )R
it a special symbol, as shown in Figure 4.23b. This is yet another
primitive in our vocabulary, called an ideal diode. The behavior of this
piecewise linear model can be summarized in two statements, one for
each of the segments: Diode ON (short circuit):
elements, the means for combining them, and the means of abstraction
form the graphical language of circuits. Circuit theory is a well
established discipline. With maturity has come widespread utility. The
language of circuits has become universal for pro
iI where is a constant. As before, let us attempt to determine vO as a
function of vI. Writing the node equation, vO RL = iO = f (iI) or, vO RL
= f (iI). Substituting f (iI) = iI, we get our desired node equation vO
RL = iI. Since iI = vI/RI, we get vO =
illustrated in Figure 4.60c, this two-terminal device can be used to make
a well-behaved DC current source, even starting with a ripple-containing
power supply (depicted as vS), as would be obtained from ordinary
rectifier circuits. Suppose the voltage so
(and above the threshold VT), the MOSFET is on and displays a
resistance RON between its D and S terminals, thereby pulling the
output voltage lower. However, the output voltage is not 0 V as predicted
by the simpler S model of the MOSFET. Instead, the va
our simple switch model. 5. To simplify the math in our quantatitive
examples on MOSFETs, this book commonly uses 1-volt thresholds. 290
CHAPTER SIX the mosfet switch but we ignore this resistance in the S
model. Section 6.6 will discuss the switchresisto
The network whose Thvenin equivalent is desired is shown in Figure
3.72. Let vTH and RTH be the Thvenin parameters for this network. vI
1 k 2 k 8 100 vI a + 10 k - 2 cos(t) a FIGURE 3.71 Thvenin
analysis of a circuit with a dependent source. 166 CHAPTER T
under the static discipline with the following voltage thresholds: VOL =
0.5 V, VIL = 0.9 V, VOH = 4.5 V, and VIH = 4 V. Using the switchresistor MOSFET model, design a 2-input NAND gate satisfying the
static discipline for the four voltage thresholds usi
NAND gate. Using intuition from the two-input NAND circuit, we can
build multipleinput NAND and NOR circuits. Figure 6.22a shows an ninput NOR gate and 6.22b shows an n-input NAND gate. In the
multiple-input NOR gate, the output is pulled to ground when a
current characteristic of a single solar cell is shown in Figure 4.59a.
Note that this is a sketch of the terminal voltage as a function of current
drawn out (i.e., not the associated variable convention). An array is made
by connecting a total of 100 suc