EE 331 Devices and circuits I
Solid-State Electronics II
Lecture 4
PN-JUNCTION
Doping profile of an ideal uniformly doped pn junction
BOUNDARY CONDITIONS
LAPLACES EQUATION
BUILT-IN / CONTACT VOLTAGE
in the p-region
in the n-region
PROVE
equilibrium condit

EE 331 Devices and circuits I
(LOGIC DESIGN)
Lecture 12
depletion-mode NMOS logic was the dominant technology
for many years in the design of microprocessors.
large static power dissipation inherent in NMOS logic
y
y
eventually limited further increases i

brick shaping
raw materials
Moores Law in Microprocessors
Transistors on lead microprocessors double every 2 years
Evolution in DRAM Chip Capacity
human memory
human DNA
4X growth every 3 years!
0.07 m
100000000
64,000,000
0.1 m
16,000,000
Kbit capacity/c

EE 331 Devices and circuits I
Field-Effect Transistor
Lecture 7
Linear region = Triode region
MOSFET with channel just
pinched off at the drain.
There is still a voltage equal to VGS- VTN across the inverted portion of the
channel, and electrons will be d

EE 331 Devices and circuits I
Diodes and diode circuits
Lecture 6
vo(t) = (Vp Von)exp(-t/RC)
=
Vr
<0.25
Surge current (ISC)
To keep in mind
Photodetector circuit
Photodetector model

EE 331 Devices and circuits I
Field-Effect Transistor
(continue)
Lecture 8
Step 3: Solve the circuit
Not valid
Change the assumption
10A
Condition must be hold
And vGS
50k
10V
5V
50k
10V
5V
Solve the circuit:
50k
10V
5V
14 k
14
14 k
Solve the circuit:
50k

EE 331 Devices and circuits I
(Continue)
Lecture 10
Quiz
VO
Inverter-based circuit?
Wave form
Why should the number
of inverters be odd?
t
T = 10p
How to produce a sinusoidal
signal with = 2(1/T)?
VDD
What is the behavior of this circuit?
Load line
Output

EE 331 Devices and circuits I
Field-Effect Transistor
(continue)
Lecture 9
MOSFET transistor as an electronic current source
fixed gate-source bias VGS= 3 V
If : VDD (VGS - VTN) = 3 - I = 2 V
output current will be constant at
50 A
represents an electr

EE 331 Devices and circuits I
Diodes and diode circuits
Lecture 5
Related with flat band voltage
Generation of EHP
Keep in mind
and
Thevenins theorem states that
a (linear) one-port network can
be
b replaced with an equivalent
l
d ith
i l t
circuit consis

EE 331 Devices and circuits I
Solid-State Electronics II
Lecture 3(cont.)
So far:
Intrinsic semiconductors contain only
small number of charges:
The thermal generating EHP
In thermal-equilibrium:
The electron concentration
in conduction band:
The hole co

CHAPTER 1
The physics of electrical conduction
OBJECTIVES:
Give an overview of microelectronics so as to provide a
context for the material presented in this course
Develop a basic understanding of fundamentally-important
phenomena of conduction in semico

EE 331 Devices and circuits I
Solid-State Electronics II
Lecture 3
Last time you learnt:
Discrete levels discrete regions overlap bands
Example
Let T = 300K. Determine the probability that an
energy level 3kT above the Fermi energy is occupied
by an elect

EE 331 Devices and circuits I
(CMOS LOGIC DESIGN)
Lecture 13
Quiz
CMOS Load curves
Vout
Load curves for NMOS and PMOS transistors of the static CMOS inverter
( VDD = 2.5 V). The dots represent the dc operation points for various
input voltages.
PMOS is OF