1.
2.
3.
4.
Go to the MOSIS webpage, find and download the NDA for IBM0.13, sign it, either give to TA in
person, or scan and email to TA.
Read through Appendix A, browse through problems 1.1-4 to 1.1
EE 501 Analog IC Design
Instructor Contact Information
Name: Degang Chen
Office: 2134 Coover Hall
Email: [email protected]
Phone: 294-6277
Office Hours: after classes Or any time
convenient to
Current Mirrors/Current Amplifiers
Specifications for current mirrors
How constant is io
Large ro
How large is vo range for which io is const
Small vmin
How accurate is mirror ratio
In the prese
CMOS Devices
PN junctions and diodes
NMOS and PMOS transistors
Resistors
Capacitors
Inductors
Bipolar transistors
PN Junctions
Charges on two sides equal but opposite sign.
PN Junctions
Depletion regi
Voltage doubler for gate
overdrive
t1 t2
OUTPUT AMPLIFIERS
Requirements
Provide sufficient output power in the form of
voltage or current.
Avoid signal distortion for large signal swings.
Be power
CMOS AMPLIFIERS
Introduction to Op Amp
Types of amplifiers
Simple Inverting Amplifier
Differential Amplifiers
Cascode Amplifier
Output Amplifiers
Components
Current mirrors
Current sources, current
Subcircuits
subcircuits
Each consists of one or more transistors.
They are not used by themselves.
Subcircuits
Switches
Diodes/active resistors
Current mirrors
Current sources/current sinks
Current/vo
Common mode feedback for
fully differential amplifiers
Differential amplifiers
Cancellation of common mode signals
including clock feed-through
Cancellation of even-order harmonics
Double different
CMOS Devices
PN junctions and diodes
NMOS and PMOS transistors
Resistors
Capacitors
Inductors
Bipolar transistors
The MOS Transistors
The MOS Transistors
CMOS Device Model
Objective
Hand calculation
A Common way of bandgap reference
Widlar Bandgap Voltage Reference
Kuijk Bandgap Voltage Reference
Brokaw Bandgap Voltage Reference
VBE 2 VBE1 VBE
k AE1 R3
T
ln
q AE 2 R4
I
1
1
C1
I
1
2
Op Amp compensation
The design process involves two distinct
activities:
Architecture Design
Find an architecture already available and
adapt it to present requirements
Create a new architecture th
Analysis versus design
Analysis:
Given a system, find its properties.
The solution is unique.
Design:
Given a set of properties, come up with a
system possessing them.
The solution is rarely uni
Given below, is the basic form of a super source follower. Suppose: VDD = 5 V, nominal VinQ =
2.5 V, |VT|= 0.7 V, K = 100 uA/V2, = 0.04 V-1, VBS = 0, Von = 0.2
V for all MOST.
a. Redraw it with curren
1.
Use the MOSIS webpage to find information on the doping levels of various materials (substrate,
nwell, p-diffusion, n-diffusion) in the ON 0.5 process. Find the depletion region thickness (xp and x
The MOS Transistors, n-well
The MOS Transistors, STI
CMOS Device Model
Objective
Hand calculations for analog design
Non-idealities and their effects
Efficient and accurate simulation
CMOS transi
Chapter 1
Analysis versus design
Analysis:
Given a system, find its properties.
The solution is unique.
Design:
Given a set of properties, come up with a
system possessing them.
The solution is
EE501 Lab 3 report
Exploring Transistor Characteristics
Objective:
1. To familiarize with characteristics of MOSFET such as gain, speed, power,
transconductance, output impedance and etc.
2. Explore h
Op Amp Specs and Test Benches
For simulation: book
For measurement: book
Low gain sim and meas
Sim and meas for low gain
Figure 6.6-5 Configuration for simulating the common-mode gain.
Figure 6.6-6 Ci
Differential Amplifier
amplifies the difference between two input
voltages
rejects the average or common mode value of the
two voltages
v+, v-, vo are single ended
Diff-mode input: vid=v+ - v Com-
CMOS Technology
Flow varies with process types & company
N-Well CMOS
Twin-Well CMOS
STI
Start with substrate selection
Type: n or p
Doping level, resistivity
Orientation, 100, or 101, etc
Oth
Common Gate Amplifiers
Low Rin amplifier
For input impedance matching
Cascode amplifier
For I/O isolation (reducing effective Cgd)
For ro and Av enhancement
Common Gate Amplifier
Ideal voltage
so
Common source output stage:
Vxx
When Vo1 goes low,
Vo goes high.
When M6 turns off,
Vo goes to VDD.
But M7 goes triode when
Vo reaches VDD Von7.
But Vo can never goes to
VSS even if Vo1=VDD!
For Vo to
REFERENCE CIRCUITS
A reference circuit is an independent voltage or
current or time (frequency) generator which has
a high degree of precision and stability.
Output voltage/current/time should be
ind