RESISTIVE CIRCUITS
Here we introduce the basic concepts and laws that are
fundamental to circuit analysis
LEARNING GOALS
OHMS LAW - DEFINES THE SIMPLEST PASSIVE ELEMENT: THE
RESISTOR
KIRCHHOFFS LAWS - THE FUNDAMENTAL CIRCUIT CONSERVATION
LAWS- KIRCHHOFF C
Introduction to Circuit Elements
Conductors
Independent Voltage Sources
Ideal Circuit Elements vs Practical
Dependent Voltage Sources
Independent Current Sources
Dependent Current Sources
Resistors and Ohms Law
Conductance
Resistors
Resistance related by
LOOP ANALYSIS
The second systematic technique
to determine all currents and
voltages in a circuit
IT IS DUAL TO NODE ANALYSIS - IT FIRST DETERMINES ALL CURRENTS IN A CIRCUIT
AND THEN IT USES OHMS LAW TO COMPUTE NECESSARY VOLTAGES
THERE ARE SITUATION WHERE
SINGLE NODE-PAIR CIRCUITS
IN PRACTICE, NODES MAY ASSUME STRANGE
FORMS
THESE CIRCUITS ARE CHARACTERIZED BY ALL
THE ELMENTS HAVING THE SAME VOLTAGE
ACROSS THEM - THEY ARE IN PARALLEL
+
V
EXAMPLE OF SINGLE NODE-PAIR
+
LOW DISTORTION POWER AMPLIFIER
V
THIS EL
THEVENINS AND NORTONS THEOREMS
These are some of the most
powerful analysis results to be
discussed.
They permit hiding information that
is not relevant and concentrating on
what is important to the analysis.
Low distortion audio power amplifier
TO MATCH
SINGLE LOOP CIRCUITS
BACKGROUND: USING KVL AND KCL WE CAN
WRITE ENOUGH EQUATIONS TO ANALYZE ANY
LINEAR CIRCUIT. WE NOW START THE STUDY
OF SYSTEMATIC, AND EFFICIENT, WAYS OF
USING THE FUNDAMENTAL CIRCUIT LAWS
a
1
2
b
6 branches
6 nodes
1 loop
3
c
4
WRITE 5
Thevenins Theorem, Maximum Power Transfer, and Source Loading
Objective
Understand Thevenins theorem. Study the maximum power theorem and its use to
predict the power delivered to a load in DC circuits. Measure the maximum power transfer
delivered to vari
EECE 451 Digital Electronics-Laboratory
Attendance:
Attendance for the laboratory is mandatory to submit a report on the experiment. The
group/team members must remain at their workstation for the duration of the experiment.
Independent Reports
Students a
(2‘
E
C)
53
z rpose:
To study the basic
transmission gate.
lntroductiom:
The CMOS transmissi
switch, is a linear circ
the electronic switching
Transmismission gates ar
arrangements, from simpl
through dual l of 8 data
only the basic spst and
Figure 1 show
The Voltage Transfer Characteristics of an Inverter'
Purpose:
To study the static voltage characteristics of an elementary‘
transistor inverter. _ .
Introduction:
In the experiment entitled_ﬁTransient Response_of_gunction~awﬁ
Diodes and Bipolar Transist
A TTL Clock OscillatOr
Purpose:
i
To construct a simple and commonly used crystal controlled
TTL clock oscillator.
Introﬁuction:
All synchronous digital systems require for timing purposes
some form of stable periodic square waveform. The network which
pr
4
5
rurpose:
re study the static c
0
urrent—volﬁage characteristics of an N“
channel metal—oxideesemiq
nductor field effect transistor {MOSFET}.
Intro&uctionz
One of the most popular device models for the metal"exider
semiconductor field effect transistor
Jof a two-input‘DTl’NAND gater“*
‘Ean he easily argued.
Transistor-Transistor Logic Gates
Purpose:
To study the static and dynamic response of the 54/7400
series of logic gates.
Introduction:
"“"‘Tfansistor-transistor logic (TTL, or as it is sometimes‘
de
Output Circuits
Purpose:
To study the static and dynamic characteristics of the totem
pole network.
Introduction:
The steady—state fan—out and noise immunity of saturated logic
depends on the ability of the output network, when in the logic "0"
state to a
ll CMOS logic networks is the network
Shown in As can be. gathered from the the lead line
construction 3 " “ 1(b) and the VTL in Figure 1(c) it acts as
3 Logic Invert
+
Vin
~ NMOS‘
VOIU’
n \
V our [0N ; I l K,
V = [v , ’ 1'. . a
:0; NMOS saturated DP
Measurement of the Ebers-Moll Parameters
Purpose:
To study the Ebers-Moll model of the bipolar junction transistor.
Introduction:
In computer analysis of electronic circuits, the most frequently used model for
determining the dc operating conditions of a
The Department of Electrical and Computer Engineering
EECE 451: Digital Electronics
Laboratory Final
12/02/2015
1. BJT Voltage transfer characteristics (VTC) and Gate loading effects
a. Construct the circuit in Figure 1. Assume
50,
0.7 ,
0.8 , and
0.1
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EECE 451 Digital Electronics
Fall 2015
Lecture: Madison Hall Room 257, TR 12:30 pm 1:20 pm
Laboratory: Madison Hall Room 251, W 2:00 pm- 4:50 pm
Laboratory: Madison Hall Room 251, R 2:00 pm- 4:50 pm
Instructor: D. Hebert
Office: TBA
Office Hours: 1:00 pm
The Department of Electrical and Computer Engineering
Exam 1 EECE 451 Digital Electronics Fall 2015
10/08/2015
Name:
Choose (circle below) ﬁve of the six problems for grading.
1.
2
3.
4
O‘\U‘I Exam 1
10/08/2015
1. For
a.
b.
.0
The Department of Electric
Assignment 3
Due: 9/17/2015
EECE 451 Digital Electronics
Fall 2015
Problems 3.8, 3.9, 3.10, 3.11, 3.12, 3.14, 3.15
8. Derive the pn junction transient times (transition, reverse recovery, and
storage) on page 668 and 669 in the text book starting from the
Homework 2
Date Assigned: 9/2/15
Due Date: 9/8/15
Department of Electrical and Computer Engineering
EECE 355
1. The voltage and current were measured at the terminals of the device shown below. The results are
tabulated below.
a. Construct a circuit model
Exam2
11/06/2015
TheUniversityofLouisianaatLafayette
TheDepartmentofElectricalandComputerEngineering
CircuitsandSignalsI
Name:
Fall2015
CLID:
Circle your answers and show all work for credit.
_
1. Define the following in your own words
a. Superposition
b.
Exam1
10/05/2015
TheDepartmentofElectricalandComputerEngineering
CircuitsandSignalsI
Fall2015
Circle your answers and show all work for credit.
_
1. Define the following in your own words
a. Current
b. Voltage
c. Power
d. Energy
e. Conservation of Energy
Assigned Date: 11/23/2015 EECE 355 Assignment 10
Due Date: 12/2/2015
1. The voltage and current at the input of a circuit are given by the expressions
17(t) = 15 cos(wt + 45°)V
i(t) = 5 cos(wt + 600)A
Determine the average power absorbed by the element