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Register Transfer Language (RTL) Description A new instruction is to be added to the MIPS instruction set. (Load

Word Indexed). Description: The instruction reads a word from data memory at an effective address that is defined to be the sum of a base register (Rs) and an index register (Rt). RTL Description: Rd ← M[Rs + Rt] Assembly language notation: LWI Rd, Rs, Rt (R-type) For the load word indexed instruction: • Specify the micro-operations needed to implement the instruction. • Identify the control signals that must be asserted for each micro-operation. show with header: Clock cycle RTL (micro-operation) Control signals Use a minimum number of clock cycles. Assume that each instruction has been fetched from program memory and is in the IR. 

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