Suppose that a new MIPS instruction, called bcp, was designed to copy a block of bytes from one address to
another. Assume that this instruction requires that the starting address of the source block be in register $v0 and that the destination address be in $v1. The instruction also requires that the number of bytess to copy be in $s0 (which is > 0). Furthermore, assume that the values of these registers as well as register $t4 can be destroyed in executing this instruction (so that the registers can be used as temporaries to execute the instruction).
la $v0, src
la $v1, dst
li $s0, count
Do the following: Write the MIPS assembly code to implement a block copy without this bcp instruction. Estimate the total cycles necessary for each realization to copy 100 words on the multicycle machine, assuming each instruction takes 1 cycle.
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