Problem 1. Suppose
we have 220 bytes of virtual memory and 216 bytes of physical main memory. Suppose the page size is 28 bytes.
a) How many pages are there in virtual memory?
b) How many page frames are there in main memory?
c) How many entries are in the page table for a process that uses all of virtual memory?
Problem 2. Assume the following for the memory system in Problem 1.
- Main memory access requires 30 ns.
- The page fault rate is 0.01%.
- It takes 12 ms to access a page not in memory (this time includes the time necessary to transfer the page into memory, update the page table, and access the data).
- A TLB hit requires 7 ns.
- The cache miss rate is 3%.
- The TLB hit rate is 95%.
- A cache hit requires 15 ns.
On a TLB or cache miss, the time required for access includes a TLB and/or cache update, but the access is not restarted. On a page fault, the page is fetched from disk, all updates are performed, but the access is restarted. All references are sequential (no overlap and nothing is done in parallel).
a) Calculate the time for a TLB hit and a cache hit.
b) Calculate the EAT (effective access time) for a TLB hit.
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