EE 2301, Fall ’16
2
(a) Design a combinational circuit to implement a
single step
of the
Collatz
procedure, as follows. Let the bits
X
= (
X
0
,...,X
7
) represent the initial
value of
x
, least signiﬁcant bit ﬁrst. Let the bits
Y
= (
Y
0
,...,Y
7
) represent
the result. Let
end
be a bit that indicates that
x
= 1; let
over
be a bit
that indicates that there is an overﬂow. Design your circuit with inputs
X
and outputs
Y
,
end
and
over
, as shown in Figure 1, such that
•
if
X
= 1, then
end
= 1 and
over
= 0;
•
else if there is an overﬂow, then
end
= 0 and
over
= 1;
•
else if
X
is odd, then
Y
= 3
X
+ 1 and
end
=
over
= 0;
•
else
Y
=
X/
2 and
end
=
over
= 0.
In your design, you may use standard modules such as adders, comparators
and multipliers. However, you should specify how each of these modules
is built from logic gates. In addition to drawing gate schematics, you
are encouraged to provide your answer in the form of textual hardware
description. (This is not required.) You can use Verilog, VHDL, or even a
general-purpose language such as C, Java, or Python. Or you use a generic
form such as this:
FullAdd(a, b, ci: s, co) {
g0 = XOR(a,
b);
g1 = AND(a,
b);
g2 = AND(ci, g0);
s
= XOR(ci, g0);
co =
OR(g1, g2);
}
Provide an explanation of the ﬂow of your design to assist the grader.