4. The logic diagrams below illustrate DeMorgan's theorems using gate equivalences and truth tables. The top logic diagram illustrates DeMorgan's theorem. Inputs Output XY XY X + Y F+ r O NAND Negative-OR 0 Inputs Output X + Y XY -X+ Y =D XY 0 NOR Negative-AND 5. The logic diagrams below illustrate DeMorgan's theorems using gate equivalences and truth tables. The bottom logic diagram illustrates DeMorgan's theorem.

9. The logic diagrams below illustrate SOP (Sum of Products) terms. The bottom logic diagram uses gate implementation. - X = AB + BCD + AC - X = AB + BCD + AC 10. Determine the minimum SOP for the following Karnaugh Map. AR ABC + ABC + ABC + ABC -000 001 110 100 00 10

1 5. The logic diagrams below illustrate DeMorgan's theorems using gate equivalences and truth tables. The bottom logic diagram illustrates DeMorgan's theorem. Inputs Output X XY X + Y X XY X - D X + Y 0 NAND Negative-OR Inputs Output Y X +V XY X Y - x + Y D XY 1 1 0 0 NOR Negative-AND 0 O 6. (NOT) (A AND B) == 7. (NOT) (A OR B) = 8. The logic diagram below illustrates a term. DX= AB+BCD + AC