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ME305 HW #6 Asif Sabanovic Due date 19/12/2012 In this problem you will have opportunity to practice the techniques learned so far on some unusual...

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ME305 HW #6 Asif Sabanovic Due date 19/12/2012 In this problem you will have opportunity to practice the techniques learned so far on some unusual but very interesting converter structures. At first a simpler converter is introduced as depicted in the following Fig.1.a Fig.1.a Fig.1.b 1. Shown in Fig.1.a is a derivative of the boost converter, so-called tapped inductor boost converter. a – Assuming all components ideal (transistor and diode ideal switches, perfect coupling between the windings, zero winding resistance), find the DC voltage gain of the converter M= V / V g . b – Draw the salient features of the input current labeling all important quantities. For numerical value assume D=0. 8 c – The autotransformer version of Fig.1.a (tapped inductor) has its cousin – the transformer version of Fig. 1.b. For this converter find the voltage gain and draw the salient features of the source current i g for both the general case of 1:N turns ration as well as for the special case of 1:1 turns ratio. 2. The converter from Fig. 1.b can be easily modified by inverting the polarity of the dot signs for transformer to result in converter of Fig. 2 on which the remaining part of the homework is based. The ideal switches S 1 and S 2 as before complement each other: S 1 is closed for interval DT while S 2 is open for that interval and closed for interval (1-D)T. Fig 2. a – For the given 1:1 turns ratio of the transformer find and plot DC voltage gain M as a function of the duty cycle D for D [0,1]. Are there any unusual features not seen before?; b – Draw the salient features of the converter current ig for L=0.4 mH and D=0.8. How does it differ from the case in Fig. 1.b. What can be said about the power flow? c – Implement the switches S1 and S2 by use of a transistor and a diode. How does this limit the voltage gain obtained in part 2.a? Component Values L=0.4 mH C=10 F R=20 Ohm v g =15 V f s =40 kHz v g , i g L L C R v Q D R N L v g , i g L C v Q D 1 R 1 L v g L C v S 2 1 i g + S 1
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d – Assume that the transistor V Q and diode V D voltage drops can be modelled by voltage sources V Q =0.33 V, V D =1 V. Find the converter DC voltage gain and its efficiency in the form =f( V , V g ,V Q ,V D ) e – To which other basic converter can this converter be compared?. How do their efficiencies compare for low voltage applications where V =3 V and V Q =0.33 V, V D =1 V and V g =15 V? 3. Mode of Operation a – Derive and plot the salient features of the actual voltage gain which will be observed on the hardware circuit for the entire duty cycle range D [0,1] when implemented as in paragraph 2.c. Assume ideal switches and lossless L and C. b – How can you implement in hardware DC gain characteristics obtained in paragraph 2.a.? What would the corresponding source current waveform look like? For which application would you recommend this converter? c – Derive the converter of Fig. 2. by following the sequence of topological transformations on one of the basic converters. The correct result should provide the better inside into the peculiar features of this converter.
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