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A semiconductor company's basic manufacturing process involves building circuitry on a single silicon wafer one layer at a time.

A semiconductor company's basic manufacturing process involves building circuitry on a single silicon wafer one layer at a time. The same basic 5 steps (with variations dictated by the circuit design) are repeated for as many layers as needed, in this case 12 layers. Please see the process map below.



Steps involved in building one layer of circuit. Total of 12 layers for the wafer to complete processing.


Resource grp--Wait times e/ layer(hours)-----Process times e/layer (mins)

Deposition ---------------14---------------------------------------- 140


Lithography ----------------20----------------------------------------- 75


Etching --------------------7 -------------------------------------------45


Doping ----------------------18 --------------------------------------------50


Furnaces -------------------28 -------------------------------------------300




The five steps completed in each layer are:

a)    Electrochemical Deposition, where coats of conductive materials are applied to the wafer substrate

b)   Lithography, where circuit patterns are imaged onto the coated wafers

c)    Etching, where the circuitry is embossed by dissolving the coat selectively

d)   Doping, or Ion implantation, where different parts of the circuit are given special characteristics

e)    Furnaces, where the doped regions of the circuits are activated for circuit function


A wafer has with slots for 500 chips or die each. When the 12-layer circuit is completed, the wafer is sliced to obtain the 500 die, which are then individually packaged in a die-packaging facility. However, after each layer is built, because of contaminants or other quality defects, an average 2% of the die are rejected or marked as unusable. So, at the end, when the wafer is sliced, we only obtain a fraction of the 500 die we started with, that can be packaged and shipped to customers.


There is a dedicated machine for each step, so each layer corresponds to a repeat visit by the wafer to that machine for that step. Since the wait times are not infinite (no matter how lengthy), you can assume less than 100% utilization at machines for each step. Demand for the company's chips is at the rate of 7500 good quality die/day. The factory operates 24 hours / day, 7 days / week.



(a)  What is the total WIP (in wafers) in the factory? Also, report the average number of wafers in queue at each of the major steps

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