The Intel 80486 has an on-chip, unified cache. It contains 8 KBytes and has a four-way
organization and a block length of four 32-bit words. The cache is organized
into 128 sets. There is a single "line valid bit" and three bits, B0, B1, and B2
(the "LRU" bits), per line. On a cache miss, the 80486 reads a 16-byte line from main
memory in a bus memory read burst. Draw a simplified diagram of the cache and
show how the different fields of the address are interpreted.